HW3 · P1: Differential Amplifier (Baker 22.16)

Discussion prompt

Before we open HW3 · P1: Differential Amplifier (Baker 22.16): without looking back, what was the main idea of HW2 · Small-Signal Gain & Frequency Response (Baker 21.7, 21.26, 21.30, 21.36), and what could you do by the end of it that you could not do before?

Hint: One sentence for the idea, one for the skill. If the second one is blank, that is the part to revisit.

Comparison matrix

From Table 9.1 - the long-channel process: refill the NMOS column from what you know. The rest of the table is as it appeared.

Discussion prompt

The output responds with a differential gain Adm to vid and a tiny common-mode gain Acm to VCM. Their ratio is the figure of merit:

That is stated as though it always holds. Do one of two things: produce a case where it fails, or say precisely what rules such a case out. "It just does" is not on the menu.

Hint: Hunt at the extremes first — zero, one, negative, empty, equal. If every extreme survives, the reason they survive is the proof.

Discussion prompt

Run Recipe: the whole problem, in order with this step confiscated:

Gain: draw the differential half-circuit, then Av = gm1*(ro2 || ro4).

Is it still possible? If it is, say what takes its place and what it costs you. If it is not, say exactly what that step was providing that nothing else does.

Hint: A step you can drop for free was never load-bearing. If you cannot drop it, name the thing that goes wrong the moment it is gone.

Discussion prompt

Recipe: the whole problem, in order works on the cases you have just seen. Push it to the edge: what is the most degenerate input it still handles — empty, zero, one item, everything equal — and what is the first case where it stops being true? Name the case, not just "it breaks".

Hint: Try the smallest legal input, then the largest, then the one where two things collide. Methods are specified at their edges; the middle takes care of itself.

Predict first

With vG1 = vG2 = VCM, the pair is perfectly balanced, so the matched M1 and M2 share the tail current equally (Lecture 7):

Commit before you compute: what does (a) Step 1 - the tail current splits in two come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: The load devices carry the same current

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. M3 is in series with M1 and M4 is in series with M2, so ID3 = ID4 = 5 uA too.

Discussion prompt

Work backwards. The example finished here:

The load devices carry the same current

What was it asked to do, and what must it have been given? Reconstruct the problem from its answer.

Hint: Every quantity in the result had to enter somewhere. Account for each one.

Discussion prompt

Invert the saturation square law for M1 (W/L = 10/2 = 5, KPn = 120 uA/V^2) to get the overdrive VOV (the course also calls this VDS,sat):

What do you need to know — or decide — before the first line can be written? List everything the problem has to hand you.

Hint: Anything you would have to invent to get started is a thing the problem must supply.

Annotate

From (a) Step 2 - overdrive & VGS of the NMOS pair — read this one piece at a time. What is each part doing?

On: \( I_D=\tfrac12 KP_n\tfrac{W}{L}V_{OV,n}^2\;\Rightarrow\;V_{OV,n}=\sqrt{\frac{2I_D}{KP_n\,(W/L)}}=\sqrt{\frac{2(5\,\mu A)}{(120\,\mu A)(5)}} \)

• VOV,n = sqrt(10uA / 600uA) = sqrt(0.0167) = 0.129 V. (At the 20 uA reference VOV would be 0.25 V; quartering the current drops VOV by sqrt(4) = 2x.)
• VGS1 = VTHN + VOV,n = 0.8 + 0.129 = 0.929 V. This is the gate-source voltage on each input device.

Animation

Shows: Each line of the worked example "(a) Step 3 - overdrive & VSG of the PMOS load", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: VSG = |VTHP| + VOV,p = 0.9 + 0.158 = 1.058 V for M3 and M4. The diode-connected M3 develops exactly this VSG to sustain its 5 uA.

Animation

Shows: Each line of the worked example "(a) Step 4 - walk every node voltage", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Balanced, M4 mirrors M3, so the output self-biases to the same level: Vout = VD2 = VD4 = 3.942 V. (Detail on the next slide.)

Discussion prompt

Explain (a) Why Vout lands at VDD - VSG by analogy to something with no Analog CMOS IC Design in it at all — a queue, a recipe, a map, a bank balance, whatever fits. Then say where your analogy breaks.

Hint: An analogy that never breaks is not an analogy, it is the same idea wearing a hat. Find the seam — that is the part that is actually new.

Predict first

The table runs: M1 | VD1 - VS = 3.942 - 1.571 = 2.37 V | vs 0.129 V | saturated · M2 | Vout - VS = 3.942 - 1.571 = 2.37 V | vs 0.129 V | saturated · M3 (diode) | VSD = VSG = 1.058 V | vs 0.158 V | saturated

In (a) Step 5 - check saturation at every device, given the rows so far: what is the next one — the row where device is M4?

Correct: M4 | VDD - Vout = 5 - 3.942 = 1.058 V | vs 0.158 V | saturated

Why: The relationship between the columns, not the individual numbers, is what generates the next row. The tail node VS = 1.571 V is well above the ~0.2-0.4 V a current source needs.

Comparison matrix

From (a) Step 5 - check saturation at every device: refill the >= VOV? column from what you know. The rest of the table is as it appeared.

Predict first

A student writes this, and it looks reasonable:

Putting the whole 10 uA tail current through each input device.

It is wrong. Say what breaks — and say it before you turn the page.

Correct: Gives VOV,n = 0.183 V and VGS = 0.983 V - and every node voltage, gm, and ro downstream is now wrong.

A balanced pair splits the tail: each branch carries ISS/2 = 5 uA.

Why: Gives VOV,n = 0.183 V and VGS = 0.983 V - and every node voltage, gm, and ro downstream is now wrong.

Discussion prompt

Explain (b) The small-signal procedure by analogy to something with no Analog CMOS IC Design in it at all — a queue, a recipe, a map, a bank balance, whatever fits. Then say where your analogy breaks.

Hint: An analogy that never breaks is not an analogy, it is the same idea wearing a hat. Find the seam — that is the part that is actually new.

Discussion prompt

Drive the inputs antisymmetrically (+vid/2 on M1, -vid/2 on M2). By symmetry the tail node does not move at all - it is an AC virtual ground (Lecture 7).

That is stated as though it always holds. Do one of two things: produce a case where it fails, or say precisely what rules such a case out. "It just does" is not on the menu.

Hint: Hunt at the extremes first — zero, one, negative, empty, equal. If every extreme survives, the reason they survive is the proof.

Animation

Shows: Each line of the worked example "(b) Step 1 - the transconductance gm1", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: gm1 = 2(5 uA)/0.129 V = 77.5 uA/V. Cross-check vs the table: 150 uA/V at 20 uA, scaled by sqrt(5/20) = 0.5, gives ~75 uA/V. Consistent (the small gap is rounding in KP).

Predict first

Output resistance comes from channel-length modulation, ro = 1/(lambda*ID), with the table's lambda (NMOS 0.01, PMOS 0.0125) at ID = 5 uA:

Commit before you compute: what does (b) Step 2 - the output resistances ro2, ro4 come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: Sanity-check against the table

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. The table lists ron = 5 Mohm, rop = 4 Mohm at 20 uA.

Animation

Shows: Each line of the worked example "(b) Step 2 - the output resistances ro2, ro4", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: The table lists ron = 5 Mohm, rop = 4 Mohm at 20 uA. At 5 uA (a quarter of the current) ro is 4x larger: 20 Mohm and 16 Mohm. Exactly what we got.

Animation

Shows: Each line of the worked example "(b) Step 3 - assemble the gain", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: 20log10(690) = 57 dB. The big ro (lambda is only ~0.01) is exactly why a one-stage long-channel OTA reaches the high-50s dB - the same story as the table's intrinsic gain gmro = 750.

Put in order

Put the moves of (b) The AC drain currents - directions into the order they have to happen.

1. M1 current rises
2. M2 current falls
3. The mirror folds M1's current to the output

Why: These are the moves of the worked example in the order it makes them, and each one is set up by the one before it. id1 = +gm1*(vid/2) flows down through M1 and up through diode-connected M3.

Discussion prompt

Work backwards. The example finished here:

The mirror folds M1's current to the output

What was it asked to do, and what must it have been given? Reconstruct the problem from its answer.

Hint: Every quantity in the result had to enter somewhere. Account for each one.

Predict first

A student writes this, and it looks reasonable:

Treating the active-mirror OTA like a resistively-loaded pair that delivers only half the transconductance to a single output.

It is wrong. Say what breaks — and say it before you turn the page.

Correct: Halving gm gives Av ~ 345 and fu ~ 0.6 MHz - both a factor of two low.

The current mirror adds M1's and M2's contributions at the output.

Why: Halving gm gives Av ~ 345 and fu ~ 0.6 MHz - both a factor of two low. The folded mirror current is the missing half.

Discussion prompt

The rule this trap just fixed:

Full gm1 appears at the output, so Av ~ 690. The active mirror is exactly the trick that recovers the factor of two a single-ended resistive load would lose.

Now break it on purpose. Build a case that violates it and follow the consequences until something visibly fails. Where does the failure first show up — and would you have noticed it if you had not been looking?

Hint: The dangerous rules are the ones whose violation still produces an answer. If yours fails loudly, try to find one that fails quietly.

Animation

Shows: Each line of the worked example "(c) The upper limit VCM,max", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Above 4.74 V the input pair can no longer keep VDS1 >= VOV; M1 slides into triode, the square law breaks, and the gain collapses. So 4.74 V is the highest usable common-mode input.

Fill in the blanks

From (c) The lower limit VCM,min — finish the line. Write what belongs on the right of the equals sign before you look.

V_V_{S,\min}+V_{GS}\approx 2.1\,\text{V} = ___

Why: Producing the right-hand side unprompted is the difference between recognising this line and being able to use it. VCM,min = VS,min + VGS = 1.16 + 0.929 ~ 2.1 V.

Animation

Shows: Each line of the worked example "(c) The lower limit VCM,min", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Input common-mode range is roughly 2.1 V to 4.74 V (the VCM = 2.5 V operating point sits safely inside it). The answer the problem specifically wants is the ceiling expressed in terms of the output: VCM,max = Vout + VTHN.

Predict first

A student writes this, and it looks reasonable:

Testing M1's saturation as if its source were at ground, so 'any VCM below VDD is fine.'

It is wrong. Say what breaks — and say it before you turn the page.

Correct: Forgets the input drain is held near 3.94 V by the load.

Reference M1's saturation to its own drain, which sits at Vout.

Why: Forgets the input drain is held near 3.94 V by the load. You'd wrongly allow VCM all the way to VDD.

Discussion prompt

The output node carries the full output resistance Rout and the load CL = 10 pF. One pole:

What do you need to know — or decide — before the first line can be written? List everything the problem has to hand you.

Hint: Anything you would have to invent to get started is a thing the problem must supply.

Animation

Shows: Each line of the worked example "(d) The 3-dB frequency", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Rout is huge (8.89 Mohm), so even a 10 pF load gives a very low corner. The internal nodes are low-impedance (1/gm of the diode), so their poles sit far higher and don't matter here.

Predict first

Above f3dB the gain rolls off at 20 dB/decade. Unity gain (|Av| = 1) is reached at Av times higher frequency:

Commit before you compute: what does (d) The unity-gain frequency come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: Note what fu does NOT depend on

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. fu has no lambda and no ro in it.

Animation

Shows: Each line of the worked example "(d) The unity-gain frequency", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: fu has no lambda and no ro in it. So even though our gain correction (lambda fix) moved Av from 130 to 690, fu stayed put at 1.23 MHz. It is set by gm and CL alone.

Predict first

A student writes this, and it looks reasonable:

Reporting the 3-dB corner as the unity-gain frequency.

It is wrong. Say what breaks — and say it before you turn the page.

Correct: That is where the gain first DROPS by 3 dB, with the gain still ~690.

Unity gain is Av times higher than the corner.

Why: That is where the gain first DROPS by 3 dB, with the gain still ~690. The amplifier is nowhere near unity gain yet.

Sort into buckets

Some of these hold up and some are the exact mistakes this lesson is built to prevent. Sort them.

Holds up

The output responds with a differential gain Adm to vid and a tiny common-mode gain Acm to VCM. Their ratio is the figure of merit:; The output is a high-impedance node - M2 pulls 5 uA down, M4 pushes 5 uA up, and the voltage floats to wherever those balance.; From Lecture 4a, every small-signal analysis is three moves:

Breaks

Putting the whole 10 uA tail current through each input device.; Treating the active-mirror OTA like a resistively-loaded pair that delivers only half the transconductance to a single output.

sound

These are stated as this lesson states them — each one survives the edge cases HW3 · P1: Differential Amplifier (Baker 22.16) puts it through.

flawed

Each of these is lifted from a trap in this deck: reasonable-sounding, and wrong in a way that only shows up once you rely on it.

Eliminate the wrong options

What is the low-frequency differential gain of this OTA?

3 of these 4 are wrong. Strike them one at a time, and say what rules each one out before you strike the next. The survivor is the answer.

• A. ~690 (57 dB)
• B. ~130 (42 dB)
• C. ~1400 (63 dB)
• D. ~345 (51 dB)

Survives elimination: A

Why: ro2||ro4 = (2016)/(20+16) = 8.89 Mohm. Av = gm1Rout = 77.5 uA/V * 8.89 Mohm = 690, i.e. 57 dB. The large ro (small lambda) is what makes a single long-channel stage this high.

Check your understanding

What is the low-frequency differential gain of this OTA?

• A. ~690 (57 dB) (correct)
• B. ~130 (42 dB)
• C. ~1400 (63 dB)
• D. ~345 (51 dB)

Answer: A

Why: ro2||ro4 = (2016)/(20+16) = 8.89 Mohm. Av = gm1Rout = 77.5 uA/V * 8.89 Mohm = 690, i.e. 57 dB. The large ro (small lambda) is what makes a single long-channel stage this high.

Why B tempts people

Uses lambda = 0.06 instead of the table's 0.01/0.0125, making ro ~6x too small. With the real Table 9.1 lambda, ro is 20 M / 16 M and the gain is ~690.

Why C tempts people

Used gm1ro2 (the NMOS intrinsic gain alone) instead of the PARALLEL combination ro2||ro4. The PMOS load resistance ro4 lowers the output resistance, so the gain is below the single-device gmro.

Why D tempts people

Halved gm1 - that would be right for a resistively-loaded single-ended pair. The active mirror folds and adds both currents, so the full gm1 appears.

Eliminate the wrong options

The unity-gain frequency fu of this diff-amp is:

3 of these 4 are wrong. Strike them one at a time, and say what rules each one out before you strike the next. The survivor is the answer.

• A. ~1.23 MHz
• B. ~1.8 kHz
• C. ~0.62 MHz
• D. ~210 kHz

Survives elimination: A

Why: fu = gm1/(2piCL) = 77.5 uA/V / (2pi10 pF) = 1.23 MHz. Equivalently Av*f3dB = 690 * 1.79 kHz = 1.23 MHz. It depends only on gm and CL - not on lambda or ro.

Check your understanding

The unity-gain frequency fu of this diff-amp is:

• A. ~1.23 MHz (correct)
• B. ~1.8 kHz
• C. ~0.62 MHz
• D. ~210 kHz

Answer: A

Why: fu = gm1/(2piCL) = 77.5 uA/V / (2pi10 pF) = 1.23 MHz. Equivalently Av*f3dB = 690 * 1.79 kHz = 1.23 MHz. It depends only on gm and CL - not on lambda or ro.

Why B tempts people

That is the 3-dB corner f3dB, where the gain first drops, not where it reaches unity. Unity is Av (~690) times higher in frequency.

Why C tempts people

Used gm1/2 instead of the full gm1 - the active mirror delivers the whole pair transconductance, so fu is twice this.

Why D tempts people

That would be Av*f3dB if Av were only ~130 (the old wrong-lambda gain). But fu does not depend on lambda; with the correct gm it is 1.23 MHz regardless of the gain value.

Draw it

One page, no notation unless you need it: draw how these connect — Part (a) The DC operating point · Part (b) The differential gain · Part (c) Input common-mode range · Part (d) 3-dB and unity-gain frequency. Put an arrow wherever one of them is what makes another possible, and label the arrow with why.