HW2 · DC Bias: Currents & Saturation (Baker 20.25, 20.45)

Comparison matrix

From The process table we are using: refill the NMOS column from what you know. The rest of the table is as it appeared.

Discussion prompt

In saturation, the drain current is the square-law - this is the only device equation we need today:

That is stated as though it always holds. Do one of two things: produce a case where it fails, or say precisely what rules such a case out. "It just does" is not on the menu.

Hint: Hunt at the extremes first — zero, one, negative, empty, equal. If every extreme survives, the reason they survive is the proof.

Put in order

These are the steps of Recipe: analyze any mirror / bias string, scrambled. Put them back in order before the next slide shows you.

1. Find the reference branch - the one with a known current or a diode-connected device - and solve it for Vov (and VGS).
2. Copy the gate-source voltage to every device sharing that gate node.
3. Scale the current by (W/L) ratios to get each branch current.
4. Verify saturation at each drain with VDS >= Vov; only then is the square-law valid.

Why: This is the order the recipe itself gives. Recalling the sequence without the slide in front of you is the difference between recognising the method and being able to run it — most of what goes wrong in practice is a step done out of turn.

Discussion prompt

Recipe: analyze any mirror / bias string works on the cases you have just seen. Push it to the edge: what is the most degenerate input it still handles — empty, zero, one item, everything equal — and what is the first case where it stops being true? Name the case, not just "it breaks".

Hint: Try the smallest legal input, then the largest, then the one where two things collide. Methods are specified at their edges; the middle takes care of itself.

Discussion prompt

Explain The circuit: a 3-output PMOS mirror by analogy to something with no Analog CMOS IC Design in it at all — a queue, a recipe, a map, a bank balance, whatever fits. Then say where your analogy breaks.

Hint: An analogy that never breaks is not an analogy, it is the same idea wearing a hat. Find the seam — that is the part that is actually new.

Discussion prompt

Read the picture before the words. What is this showing, and what is the one thing it is built to make obvious? Commit to an answer, then read on.

Hint: Name the parts, then say what changes between them — and if nothing changes, say what is being held still.

Discussion prompt

Explain A mirror copies a voltage, then scales to a student a year behind you. No notation, no jargon they have not met — and it still has to be true.

Hint: If your explanation needs a symbol they have never seen, you are describing the notation rather than the idea.

Predict first

M1 is forced to 20 uA. Invert the square-law to get its overdrive. PMOS W/L = 40/2 = 20, KPp = 40 uA/V^2.

Commit before you compute: what does Step 1 - VSG and Vov from M1 come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: Solve for Vov

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. Vov^2 = 20uA / 400uA = 0.05, so Vov = 0.224 V of overdrive on M1.

Animation

Shows: Each line of the worked example "Step 1 - VSG and Vov from M1", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Vov^2 = 20uA / 400uA = 0.05, so Vov = 0.224 V of overdrive on M1.

Discussion prompt

M2 is the same 40/2 device with the same VSG, so it copies the current 1:1.

What do you need to know — or decide — before the first line can be written? List everything the problem has to hand you.

Hint: Anything you would have to invent to get started is a thing the problem must supply.

Animation

Shows: Each line of the worked example "Step 2 - M2 carries 20 uA (and stays saturated)", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: VSD2 = VDD - VD2 = 5 - 3.5 = 1.5 V, well above Vov = 0.224 V. M2 is saturated, so the 1:1 copy is valid.

Discussion prompt

Work backwards. The example finished here:

Verify saturation at the 2 V drain

What was it asked to do, and what must it have been given? Reconstruct the problem from its answer.

Hint: Every quantity in the result had to enter somewhere. Account for each one.

Discussion prompt

Explain Refinement: channel-length modulation to a student a year behind you. No notation, no jargon they have not met — and it still has to be true.

Hint: If your explanation needs a symbol they have never seen, you are describing the notation rather than the idea.

Predict first

A student writes this, and it looks reasonable:

Treating the 2 V source (or R2) as if it controls the branch current, like a resistor divider.

It is wrong. Say what breaks — and say it before you turn the page.

Correct: This is Ohm's-law thinking. A saturated FET is a current source - its drain voltage barely moves the current.

The shared VSG sets the current; the load only sets the drain voltage.

Why: This is Ohm's-law thinking. A saturated FET is a current source - its drain voltage barely moves the current.

Discussion prompt

The rule this trap just fixed:

Current is fixed by geometry and VSG. The drain voltage is free to be whatever the load demands.

Now break it on purpose. Build a case that violates it and follow the consequences until something visibly fails. Where does the failure first show up — and would you have noticed it if you had not been looking?

Hint: The dangerous rules are the ones whose violation still produces an answer. If yours fails loudly, try to find one that fails quietly.

Eliminate the wrong options

To first order, what is the drain current in M3?

3 of these 4 are wrong. Strike them one at a time, and say what rules each one out before you strike the next. The survivor is the answer.

• A. 10 uA
• B. 20 uA
• C. 40 uA
• D. About 11.4 uA (2 V / 175 k)

Survives elimination: A

Why: M3 shares M1's VSG but has half the W/L (20/2 vs 40/2). A mirror scales current by the W/L ratio: I_D3 = (1/2) x 20 uA = 10 uA. Its 2 V drain only matters for confirming saturation (VSD = 3 V > Vov), which checks out.

Check your understanding

To first order, what is the drain current in M3?

• A. 10 uA (correct)
• B. 20 uA
• C. 40 uA
• D. About 11.4 uA (2 V / 175 k)

Answer: A

Why: M3 shares M1's VSG but has half the W/L (20/2 vs 40/2). A mirror scales current by the W/L ratio: I_D3 = (1/2) x 20 uA = 10 uA. Its 2 V drain only matters for confirming saturation (VSD = 3 V > Vov), which checks out.

Why B tempts people

That is M1's and M2's current (both 40/2). M3 is 20/2 - half the width means half the copied current, 10 uA.

Why C tempts people

Doubles instead of halves - this would be right only if M3 were twice M1's W/L. It is half, so the current goes down, not up.

Why D tempts people

Treats the branch like a resistor divider through the load. A saturated MOSFET is a current source set by VSG and W/L, not by drain voltage over R2.

Discussion prompt

Explain The circuit: stacked NMOS mirrors by analogy to something with no Analog CMOS IC Design in it at all — a queue, a recipe, a map, a bank balance, whatever fits. Then say where your analogy breaks.

Hint: An analogy that never breaks is not an analogy, it is the same idea wearing a hat. Find the seam — that is the part that is actually new.

Discussion prompt

Walk from VDD to ground down the left branch: you drop across R1, then across M3, then across M1. Because both FETs are diode-connected and identical, each drop is one VGS.

That is stated as though it always holds. Do one of two things: produce a case where it fails, or say precisely what rules such a case out. "It just does" is not on the menu.

Hint: Hunt at the extremes first — zero, one, negative, empty, equal. If every extreme survives, the reason they survive is the proof.

Predict first

Substitute the square-law I = (1/2)KPn(W/L)Vov^2 with W/L = 40/4 = 10, so I = 600uA * Vov^2, and VGS = Vov + 0.8:

Commit before you compute: what does Step 1 - solve the reference for I come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: Take the positive root

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. Vov = 0.222 V, so VGS = 1.022 V and I = 600uA x (0.222)^2 = 29.6 uA in each branch.

Animation

Shows: Each line of the worked example "Step 1 - solve the reference for I", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: Vov = 0.222 V, so VGS = 1.022 V and I = 600uA x (0.222)^2 = 29.6 uA in each branch.

Discussion prompt

With VGS = 1.022 V and I = 29.6 uA, label the left branch from the ground up.

What do you need to know — or decide — before the first line can be written? List everything the problem has to hand you.

Hint: Anything you would have to invent to get started is a thing the problem must supply.

Animation

Shows: Each line of the worked example "Step 2 - every node voltage", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: 2.044 V + 2.96 V = 5.0 V = VDD. The KVL loop is consistent.

Predict first

M4 is the cascode (top) device. Its source sits at 1.022 V, and it needs VDS4 >= Vov to stay saturated:

Commit before you compute: what does Step 3 - largest R2 before M4 drops out come out to? A rough magnitude and the right form is enough — the point is to have something concrete to be wrong about.

Correct: Convert to a max drop across R2

Why: A prediction you can defend turns the computation into a check rather than a leap of faith — and an answer that contradicts it is caught on the spot. The drop VDD - VD4 can be at most 5 - 1.244 = 3.756 V before M4 starves.

Animation

Shows: Each line of the worked example "Step 3 - largest R2 before M4 drops out", appearing one at a time.

The same working the example does, in the order a tutor would write it.

Takeaway: The drop VDD - VD4 can be at most 5 - 1.244 = 3.756 V before M4 starves.

Predict first

A student writes this, and it looks reasonable:

Testing the cascode M4 as if its source were at 0 V.

It is wrong. Say what breaks — and say it before you turn the page.

Correct: Forgets M4 is stacked: its source is held at 1.022 V by M2 below it, not at ground.

Reference every voltage to M4's own source node, 1.022 V.

Why: Forgets M4 is stacked: its source is held at 1.022 V by M2 below it, not at ground.

Sort into buckets

Some of these hold up and some are the exact mistakes this lesson is built to prevent. Sort them.

Holds up

In saturation, the drain current is the square-law - this is the only device equation we need today:; Three PMOS share one source rail (VDD) and one gate node. M1 is diode-connected (gate tied to drain) and is forced to carry the 20 uA the sink pulls.; Copy that VSG onto another device with half the width, and you get half the current - independent of what its drain is doing, as long as it stays saturated.

Breaks

Treating the 2 V source (or R2) as if it controls the branch current, like a resistor divider.; Testing the cascode M4 as if its source were at 0 V.

sound

These are stated as this lesson states them — each one survives the edge cases HW2 · DC Bias: Currents & Saturation (Baker 20.25, 20.45) puts it through.

flawed

Each of these is lifted from a trap in this deck: reasonable-sounding, and wrong in a way that only shows up once you rely on it.

Eliminate the wrong options

Maximum R2 so M4 stays in saturation is closest to:

3 of these 4 are wrong. Strike them one at a time, and say what rules each one out before you strike the next. The survivor is the answer.

• A. 127 kohm
• B. 169 kohm
• C. 161 kohm
• D. 100 kohm

Survives elimination: A

Why: M4 needs VD4 >= VS4 + Vov = 1.022 + 0.222 = 1.244 V. The max drop across R2 is 5 - 1.244 = 3.756 V, so R2,max = 3.756 V / 29.6 uA ~ 127 kohm. The given 125k sits just under this.

Check your understanding

Maximum R2 so M4 stays in saturation is closest to:

• A. 127 kohm (correct)
• B. 169 kohm
• C. 161 kohm
• D. 100 kohm

Answer: A

Why: M4 needs VD4 >= VS4 + Vov = 1.022 + 0.222 = 1.244 V. The max drop across R2 is 5 - 1.244 = 3.756 V, so R2,max = 3.756 V / 29.6 uA ~ 127 kohm. The given 125k sits just under this.

Why B tempts people

Uses the full 5 V across R2 (5/29.6uA), ignoring that M4's drain must stay at 1.244 V, not 0 V.

Why C tempts people

The 'against ground' trap: requires only VD4 >= Vov = 0.222 V, forgetting M4's source pedestal of 1.022 V. That over-counts the allowed drop.

Why D tempts people

That is R1, the reference resistor on the other branch - it sets the bias current, not the saturation edge of M4.

Draw it

One page, no notation unless you need it: draw how these connect — Recipe: analyze any mirror / bias string · The process table we are using · The two master equations · The circuit: a 3-output PMOS mirror · A mirror copies a voltage, then scales. Put an arrow wherever one of them is what makes another possible, and label the arrow with why.